For complex circuit computations, the following two laws first stated by Gutsav R. Kirchhoff (1824-87) are indispensable.

1. Kirchhoff’s Point Law or Current Law (KCL). It states as follows :

The sum of the currents entering a junction is equal to the sum of the currents leaving the junction. Refer Fig. 17.

If the currents towards a junction are considered positive and those away from the same junction negative, then this law states that the algebraic sum of all currents meeting at a common junction is zero. 15

i.e., Σ Currents entering = Σ currents leaving

I_{1} + I_{3} =I_{2} + I_{4} +I_{s }… [8 (a)]

or I_{1}+I_{3}-I _{2}-I_{4} –I_{5}=0

2. Kirchhoff’s Mesh Law or Voltage Law (KVL). It states as follows :

The sum ofthe e.m.fs (rises of potential) around any closed loop of a circuit equals the sum of the potential drops in that loop. Fig. 17

Considering a rise of potential as positive (+)and a drop of potential as negative (- ), the algebraic sum of potential differences (voltages) around a closed loop of a circuit is zero :

ΣE- ITR drops = 0 (around closed loop)

i.e., ΣE = ITR … [9 (a)]

or Σ Potential rises = Σ potential drops … [9 (b)]

To apply this law in practice, assume an arbitrary current direction for each branch current. The end of the resistor through which the current enters, is then positive, with respect to the other end. If the solution for the current being solved turns out negative, then the direction of that current is opposite to the direction assumed.

In tracing through any single circuit, whether it is by itself OJ: a part of a network, the following rules must be applied :

1. A voltage drop exists when tracing through a resistance with or in the same direction as the current, or through a battery or generator against their voltage, that is from positive{+) to negative (- ).Refer Fig. 18.

2. A voltage rise exists when tracing through a resistance against or in opposite direction to the current or through a battery or a generator with their voltage that is from negative{-) to positive (+). Refer Fig. 19.

Illustration. Consider a circuit shown in Fig. 20.

Considering the loop ABEF A, we get

-I_{1 } R_{1} – I_{3} R_{3} + E_{1} =0

or E_{1} = I_{1} R_{1} + I_{3} R_{3} (where I_{3} = I_{2} + I_{2})

Considering the loop BCDEB, we have

I_{2} R_{2} – E_{2} + I_{3}R_{3} = 0 … (ii)

or E_{2} = I_{2}R_{2} + I_{3}R_{3}

If E_{1}, E_{2}, R_{1}, R_{2 }and R_{3} are known, then h, 12 and / 3 can be calculated from eqns. (i) and (ii).